Modern NAND Flash Memory Demands Sophisticated Controllers

Since it first appeared on the market almost half a century ago, NAND flash has become almost ubiquitous, appearing in the memory cards, USB flash drives and solid-state drives integral to digital storage systems around the globe.

Driven by a relentless demand for high capacity, low-power and low-cost storage, NAND flash technology has evolved significantly during its lifetime. As the technology has become more demanding, the vital role of the controller in its ability to store data has become increasingly complex.

The Demands of NAND Flash and 3D Technologies

3D NAND technologies with multiple layers of memory cells, offer higher density storage capacities, faster data transfers and lower power consumption. Consequently, it is more often than not the flash technology of choice today and while it is the most cost effective, it also brings with it demands – requirements the controller must manage to ensure reliable and efficient data storage.

The nature of NAND flash cells

The MOSFET transistors upon which NAND flash is based are inherently unstable and degrade over time. Consequently, memory cells have a predetermined lifetime (P/E cycles) since the mechanics of the read/write operation gradually wear them out. This deterioration leads to an increase in bit errors within the NAND flash and depending in some instances these aging effects are exacerbated by the smaller cell sizes and complex structures of 3D NAND.

Managing the performance of a NAND flash memory over its lifetime is therefore a complex task requiring, advanced error correction techniques, one of the core functions of the NAND flash memory controller.

Complex Flash Requires Complex Management

The NAND flash memory controller is an essential component of any NAND flash-based memory system, guaranteeing the integrity of the data passing between the host and the flash. To guarantee the integrity it must mask the inherent deficiencies of the NAND flash – being the inevitable wear and tear of the cells and consequent bit flips and errors that come about. Different controllers offer different levels of performance, but several core functions are key to the performance of the overall NAND flash memory system.

The controller’s fundamental job is to translate the Read/Write/Status commands of the host into a format which can be understood by the NAND flash. It must translate between different interfaces host interfaces and their standards, for example SD 7.1, USB 3.1 and also translate commands for different flashes (e.g., KIOXIA, Micron or Samsung). To successfully accomplish this task the controller must execute a range of functions, including:

• Mapping of the logical block addresses, (LABs) of the host’s file system into addresses on the flash memory
• Detection and correction of errors within the NAND flash
• Implementation of appropriate digital security measures
• Flash Qualification
• Flash Calibration

The rising error rates discussed above require the controller to be capable of hosting increasingly sophisticated error correction algorithms, all of which consume valuable computing resources.

Data security is a high-profile issue in our connected world, particularly with IoT applications where each connected device is a potential point of entry for a malicious attacker. In response to this growing threat, digital security requires robust measures at all levels, including the data storage system. Implementing specific security features in the memory controller’s firmware and hardware requires yet more processing power.

Flash qualification and calibration are two further functions which are both essential to the operation of the NAND flash memory. By thoroughly testing the flash-controller combination, qualification ensures the correct design of the error correction and recovery functionality for that particular NAND flash. As the complexity and variety of flash technologies has grown, this process has become increasingly complex. Similarly with flash calibration, a time-consuming operation where the controller periodically checks and adjusts cell threshold voltages to reduce bit errors.

Choose the Optimal Memory Controller for the application

Each of the above mentioned  tasks mentioned require significant computing power and as these tasks become more complex, the challenges faced by the memory controller – the integral “brain” of the storage system - increase.

There are many different types of flash memory controllers available, each responding differently to the demands of the latest NAND flash developments. As a result, it is critical to evaluate how a given controller responds to these demands. Will it support the required interfaces, can it handle the demands of cryptographic security algorithms, and will it keep the NAND flash running error-free for the intended life of the application? When choosing or designing a NAND flash memory system choose carefully. For more information and insights on controller technology, get in touch or download our white papers to learn more.